India<\/a>’s new incentive structure<\/a> for semiconductor manufacturing<\/a> offering a flat 50% incentive sweetens the deal for applicants<\/a> aiming for older technology nodes as well as for downstream players in the supply chain like those in packaging and assembly and takes the country closer to its ambition of seeding a vibrant chipmaking ecosystem, people aware of the rationale behind the change told ET.

On Wednesday the Centre announced a fresh structure of incentives under its Rs 76,000-crore
semiconductor<\/a> manufacturing scheme offering to bear half the project cost across proposals from semiconductor factories, display panel plants, compound semiconductor proposals, and even assembly and packaging units.

The cabinet decision came in the wake of a series of representations from applicants including
ISMC Analog<\/a> — a consortium comprising Israeli tech company Tower Semiconductor and Mumbai-based Next Orbit<\/a> Ventures, Singapore-based Innovative Global Solutions & Services (IGSS) Ventures, and Tata Electronics<\/a> – which is targeting an advanced packaging facility.

\"We had made a representation in our June meeting, verbally and in writing, that the incentive should back all applicants equally,\" an ISMC representative told ET. The consortium proposes to build a $3-billion fab plant that will manufacture 65 nanometre (nm) chips.

Mails sent to Tata Electronics and IGSS on the new incentive structure remained unanswered.

Experts are of the view that with the revised incentive scheme, India can expect to showcase some ‘quick wins’, given the shorter turnaround times for the older technology nodes, whereas building a semiconductor fab could take a minimum of 18 months.

In its announcement on Wednesday, the government said technology nodes above 45 nm – used in automotive, power, and telecom applications – constitute about 50% of the semiconductor market.

K Krishna Moorthy, president and CEO for industry body IESA, said western nations like the US have focused on advanced nodes such as 5-7 nm segments used in digital products like high-end servers, but cross-sections like the 40-65 nm segment, dubbed analog and mixed signal products, have a \"headroom for growth over the next 10-15 years\", adding that India's focus has been on the larger pie of the global semiconductor revenue pegged at $600 billion by 2025.

In an interview earlier, electronics industry veteran and HCL co-founder Ajai Chowdhry had told ET that there was a large market in India for applications using nodes above 28 nm, and for white goods globally, partly why semiconductor investments committed elsewhere across nations will not have a \"chilling effect\" on Indian investments.

\"Centre<\/a><\/figure>

Centre tweaks Rs 76,000 crore semiconductor, display fabrication scheme to woo global companies<\/a><\/h2>

Minister of State for IT Rajeev Chandrasekhar said the total outlay for the package will remain the same, but harmonisation of incentives to 50 per cent will make the semiconductor policy \"extremely competitive\" and attract investment across spectrum of opportunities, namely silicon and compound fabs, packaging units, display fabs, and design and innovation ecosystem.<\/p><\/div>

India<\/a>’s new incentive structure<\/a> for semiconductor manufacturing<\/a> offering a flat 50% incentive sweetens the deal for applicants<\/a> aiming for older technology nodes as well as for downstream players in the supply chain like those in packaging and assembly and takes the country closer to its ambition of seeding a vibrant chipmaking ecosystem, people aware of the rationale behind the change told ET.

On Wednesday the Centre announced a fresh structure of incentives under its Rs 76,000-crore
semiconductor<\/a> manufacturing scheme offering to bear half the project cost across proposals from semiconductor factories, display panel plants, compound semiconductor proposals, and even assembly and packaging units.

The cabinet decision came in the wake of a series of representations from applicants including
ISMC Analog<\/a> — a consortium comprising Israeli tech company Tower Semiconductor and Mumbai-based Next Orbit<\/a> Ventures, Singapore-based Innovative Global Solutions & Services (IGSS) Ventures, and Tata Electronics<\/a> – which is targeting an advanced packaging facility.

\"We had made a representation in our June meeting, verbally and in writing, that the incentive should back all applicants equally,\" an ISMC representative told ET. The consortium proposes to build a $3-billion fab plant that will manufacture 65 nanometre (nm) chips.

Mails sent to Tata Electronics and IGSS on the new incentive structure remained unanswered.

Experts are of the view that with the revised incentive scheme, India can expect to showcase some ‘quick wins’, given the shorter turnaround times for the older technology nodes, whereas building a semiconductor fab could take a minimum of 18 months.

In its announcement on Wednesday, the government said technology nodes above 45 nm – used in automotive, power, and telecom applications – constitute about 50% of the semiconductor market.

K Krishna Moorthy, president and CEO for industry body IESA, said western nations like the US have focused on advanced nodes such as 5-7 nm segments used in digital products like high-end servers, but cross-sections like the 40-65 nm segment, dubbed analog and mixed signal products, have a \"headroom for growth over the next 10-15 years\", adding that India's focus has been on the larger pie of the global semiconductor revenue pegged at $600 billion by 2025.

In an interview earlier, electronics industry veteran and HCL co-founder Ajai Chowdhry had told ET that there was a large market in India for applications using nodes above 28 nm, and for white goods globally, partly why semiconductor investments committed elsewhere across nations will not have a \"chilling effect\" on Indian investments.

\"Centre<\/a><\/figure>

Centre tweaks Rs 76,000 crore semiconductor, display fabrication scheme to woo global companies<\/a><\/h2>

Minister of State for IT Rajeev Chandrasekhar said the total outlay for the package will remain the same, but harmonisation of incentives to 50 per cent will make the semiconductor policy \"extremely competitive\" and attract investment across spectrum of opportunities, namely silicon and compound fabs, packaging units, display fabs, and design and innovation ecosystem.<\/p><\/div>